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 FDD6796 N-Channel PowerTrench(R) MOSFET
May 2008
FDD6796
N-Channel PowerTrench(R) MOSFET
25 V, 40 A, 5.7 m Features
Max rDS(on) = 5.7 m at VGS = 10 V, ID = 20 A Max rDS(on) = 9.0 m at VGS = 4.5 V, ID = 15.5 A 100% UIL tested RoHS Compliant
General Description
This N-Channel MOSFET has been designed specifically to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. It has been optimized for low gate charge, low rDS(on) and fast switching speed.
Applications
Vcore DC-DC for Desktop Computers and Servers VRM for Intermediate Bus Architecture
D
D G
G
S
D -PA52 TO -2 K (TO -252)
S
MOSFET Maximum Ratings TC = 25 C unless otherwise noted
Symbol VDS VGS Parameter Drain to Source Voltage Gate to Source Voltage Drain Current -Continuous (Package limited) ID -Continuous (Silicon limited) -Continuous -Pulsed EAS PD TJ, TSTG Single Pulse Avalanche Energy Power Dissipation Power Dissipation TC = 25 C TA = 25 C (Note 1a) (Note 3) TC = 25 C TC = 25 C TA = 25 C (Note 1a) Ratings 25 20 40 69 20 100 39 42 3.7 -55 to +175 mJ W C A Units V V
Operating and Storage Junction Temperature Range
Thermal Characteristics
RJC RJA Thermal Resistance, Junction to Case Thermal Resistance, Junction to Ambient (Note 1a) 3.5 40 C/W
Package Marking and Ordering Information
Device Marking FDD6796 Device FDD6796 Package D-PAK (TO-252) Reel Size 13 '' Tape Width 12 mm Quantity 2500 units
(c)2008 Fairchild Semiconductor Corporation FDD6796 Rev.C
1
www.fairchildsemi.com
FDD6796 N-Channel PowerTrench(R) MOSFET
Electrical Characteristics TJ = 25 C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BVDSS BVDSS TJ IDSS IGSS Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate to Source Leakage Current ID = 250 A, VGS = 0 V ID = 250 A, referenced to 25 C VDS = 20 V, VGS = 0 V VGS = 20 V, VDS = 0 V 25 6.1 1 100 V mV/C A nA
On Characteristics
VGS(th) VGS(th) TJ rDS(on) gFS Gate to Source Threshold Voltage Gate to Source Threshold Voltage Temperature Coefficient Static Drain to Source On Resistance Forward Transconductance VGS = VDS, ID = 250 A ID = 250 A, referenced to 25 C VGS = 10 V , ID = 20 A VGS = 4.5 V, ID = 15.5 A VGS = 10 V, ID = 20 A, TJ = 150 C VDS = 5 V, ID = 20 A 1.0 1.9 -6.6 4.6 6.6 6.8 138 5.7 9.0 8.5 S m 3.0 V mV/C
Dynamic Characteristics
Ciss Coss Crss Rg Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance VDS = 13 V, VGS = 0 V, f = 1 MHz 1740 325 290 0.8 2315 430 435 1.6 pF pF pF
Switching Characteristics
td(on) tr td(off) tf Qg Qg Qgs Qgd Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Total Gate Charge Gate to Source Charge Gate to Drain "Miller" Charge VGS = 0 V to 10 V VGS = 0 V to 4.5 V VDD = 13 V, ID = 20 A VDD = 13 V, ID = 20 A, VGS = 10 V, RGEN = 6 10 6 23 4 29 15 4.9 6.2 19 11 37 10 41 21 nC nC ns ns ns ns nC
Drain-Source Diode Characteristics
VSD trr Qrr Source to Drain Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0 V, IS = 3.1 A VGS = 0 V, IS = 20 A (Note 2) (Note 2) 0.8 0.9 15 3 1.2 1.3 26 10 V ns nC
IF = 20 A, di/dt = 100 A/s
Notes: 1: RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RJA is determined by the user's board design.
a) 40 C/W when mounted on a 1 in2 pad of 2 oz copper
b) 96 C/W when mounted on a minimum pad
2: Pulse Test: Pulse Width < 300 s, Duty cycle < 2.0%. 3: Starting TJ = 25 C, L = 0.1 mH, IAS = 28 A, VDD = 23 V, VGS = 10 V.
FDD6796 Rev.C
2
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FDD6796 N-Channel PowerTrench(R) MOSFET
Typical Characteristics TJ = 25 C unless otherwise noted
100
VGS = 10 V NORMALIZED DRAIN TO SOURCE ON-RESISTANCE
4.0
VGS = 4.5 V VGS = 4 V VGS = 3.5 V
3.5
VGS = 3 V
80
ID, DRAIN CURRENT (A)
PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX VGS = 3.5 V
3.0 2.5 2.0 1.5
VGS = 4.5 V VGS = 4 V
60
PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX
40 20
VGS = 3 V
1.0
VGS = 10 V
0 0.0
0.5 0 20 40 60 80 100
ID, DRAIN CURRENT (A)
0.5
1.0
1.5
2.0
2.5
3.0
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On Region Characteristics
Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage
20
SOURCE ON-RESISTANCE (m)
1.6
NORMALIZED DRAIN TO SOURCE ON-RESISTANCE
1.4 1.2 1.0 0.8
ID = 20 A VGS = 10 V
ID = 20 A
PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX
15
rDS(on), DRAIN TO
10
TJ = 150 oC
5
TJ = 25 oC
0.6 -75 -50 -25 0 25 50 75 100 125 150 175 TJ, JUNCTION TEMPERATURE (oC)
0 2 4 6 8 10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance vs Junction Temperature
100
IS, REVERSE DRAIN CURRENT (A) PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX
Figure 4. On-Resistance vs Gate to Source Voltage
100
VGS = 0 V
80
ID, DRAIN CURRENT (A) VDS = 5 V
10 1 0.1 0.01
TJ = 175 oC TJ = 25 oC
60
TJ = 175 oC
40
TJ = 25 oC
20
TJ = -55 oC
TJ = -55 oC
0 0 1 2 3 4 5
VGS, GATE TO SOURCE VOLTAGE (V)
0.001 0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode Forward Voltage vs Source Current
FDD6796 Rev.C
3
www.fairchildsemi.com
FDD6796 N-Channel PowerTrench(R) MOSFET
Typical Characteristics TJ = 25 C unless otherwise noted
10
VGS, GATE TO SOURCE VOLTAGE (V) ID = 20 A
5000
Ciss
VDD = 13 V CAPACITANCE (pF)
8 1000 6
VDD = 10 V VDD = 16 V
Coss
4 2 0 0 5 10 15 20 25 30
Qg, GATE CHARGE (nC)
Crss
100
50 0.1
f = 1 MHz VGS = 0 V
1
10
30
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs Drain to Source Voltage
70 60
ID, DRAIN CURRENT (A)
100
IAS, AVALANCHE CURRENT (A)
40
50 40
VGS = 10 V
TJ = 25 oC
10
30
Limited by Package VGS = 4.5 V
o
TJ = 150 oC
20
RJC = 3.5 C/W
10 1 0.01 0.1 1 10 100 0 25 50 75 100 125
o
150
175
tAV, TIME IN AVALANCHE (ms)
TC, CASE TEMPERATURE ( C)
Figure 9. Unclamped Inductive Switching Capability
200 100
ID, DRAIN CURRENT (A)
Figure 10. Maximum Continuous Drain Current vs Case Temperature
10
P(PK), PEAK TRANSIENT POWER (W)
5
10
4
VGS = 10 V
SINGLE PULSE RJC = 3.5 oC/W TC = 25 oC
100 us
10
THIS AREA IS LIMITED BY rDS(on)
10
3
1 ms 10 ms 100 ms DC
1
SINGLE PULSE TJ = MAX RATED RJC = 3.5 oC/W TC = 25 oC
10
2
0.1 0.1
1
10
100
10 -6 10
1
10
-5
10
-4
10
-3
10
-2
10
-1
1
VDS, DRAIN to SOURCE VOLTAGE (V)
t, PULSE WIDTH (sec)
Figure 11. Forward Bias Safe Operating Area
Figure 12. Single Pulse Maximum Power Dissipation
FDD6796 Rev.C
4
www.fairchildsemi.com
FDD6796 N-Channel PowerTrench(R) MOSFET
Typical Characteristics TJ = 25 C unless otherwise noted
2
1
DUTY CYCLE-DESCENDING ORDER NORMALIZED THERMAL IMPEDANCE, ZJC
0.1
D = 0.5 0.2 0.1 0.05 0.02 0.01
PDM
t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC x RJc + TC
0.01
SINGLE PULSE RJC = 3.5 C/W
o
0.001 -6 10
10
-5
10
-4
10
-3
10
-2
10
-1
1
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Junction-to-Case Transient Thermal Response Curve
2
1
NORMALIZED THERMAL IMPEDANCE, ZJA
DUTY CYCLE-DESCENDING ORDER
0.1
D = 0.5 0.2 0.1 0.05 0.02 0.01
PDM
0.01
t1
SINGLE PULSE RJA = 96 C/W
(Note 1b)
o
t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJA x RJA + TA
-1 0 1
0.001 -4 10
10
-3
10
-2
10
10
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 14. Junction-to-Ambient Transient Thermal Response Curve
FDD6796 Rev.C
5
www.fairchildsemi.com
FDD6796 N-Channel PowerTrench(R) MOSFET
TRADEMARKS
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidianries, and is not intended to be an exhaustive list of all such trademarks. ACEx(R) Build it NowTM CorePLUSTM CorePOWERTM CROSSVOLTTM CTLTM Current Transfer LogicTM EcoSPARK(R) EfficentMaxTM EZSWITCHTM *
TM
(R)
Fairchild(R) Fairchild Semiconductor(R) FACT Quiet SeriesTM FACT(R) FAST(R) FastvCoreTM FlashWriter(R) *
FPSTM F-PFSTM FRFET(R) Global Power ResourceSM Green FPSTM Green FPSTM e-SeriesTM GTOTM IntelliMAXTM ISOPLANARTM MegaBuckTM MICROCOUPLERTM MicroFETTM MicroPakTM MillerDriveTM MotionMaxTM Motion-SPMTM OPTOLOGIC(R) OPTOPLANAR(R)
(R)
tm
PDP-SPMTM Power-SPMTM PowerTrench(R) Programmable Active DroopTM QFET(R) QSTM Quiet SeriesTM RapidConfigureTM Saving our world 1mW at a timeTM SmartMaxTM SMART STARTTM SPM(R) STEALTHTM SuperFETTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SuperMOSTM (R)
The Power Franchise(R)
tm
TinyBoostTM TinyBuckTM TinyLogic(R) TINYOPTOTM TinyPowerTM TinyPWMTM TinyWireTM SerDesTM
UHC(R) Ultra FRFETTM UniFETTM VCXTM VisualMaxTM
* EZSWITCHTM and FlashWriter(R) are trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD'S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. This datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only.
Rev. I34
Preliminary
First Production
No Identification Needed Obsolete
Full Production Not In Production
FDD6796 Rev. C
6
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